ECG monitoring module designed with TMS320F206

Before the heart contracts mechanically, the myocardium is pre-generated with electrical excitation and is released to various parts of the body, thereby generating a potential difference at different parts of the body surface. The continuous curve traced by the body surface in this chronological order is the electrocardiogram ECG.

Electrocardiogram is the most reliable way to diagnose arrhythmia. Other clinical examinations can diagnose some arrhythmias, but the accuracy is not high. By observing the patient's electrocardiogram, the diagnostic accuracy is almost 100%. The function of the ECG monitoring module is to record the patient's ECG waveform in real time, and perform automatic analysis and processing, and give corresponding conclusions.

With the development of digital signal processing technology and large-scale integrated circuit technology, single-chip digital signal processors are becoming more and more powerful and cheaper, and are increasingly being applied to various fields of production and life. This paper introduces a solution based on DSP chip ECG monitoring module, discusses its hardware structure and software composition.

The ECG monitoring module is a DSP data acquisition and processing module based on Texas Instruments' TMS320F206. The whole system is installed on a 4-layer PCB board and communicates with a PC through a 9-pin RS-232 cable. The block diagram is shown in Figure 1. All of the input signals include ECG1, ECG2 (two ECG signals), TEMPI (body temperature signal), RESP (respiratory signal), LEADOFF (lead off detection), PACE (pilot detection), etc. all from ECG signals Pre-analog processing module.

1 Introduction to TMS320F206

TMS320F206 (hereinafter referred to as F206) is a cost-effective 16-bit fixed-point DSP chip introduced by TI in 1996 with an operating speed of 40MIPS. The F206 architecture uses an improved Harvard architecture that separates the program memory from the data memory bus to maximize processing power. Its addressable space is 224K words (64K word program space, 64K word data space, 64K word I/O space, 32K word global space), the first 32K words in 64K word program space can be mapped to F206 on-chip integrated flicker In the memory (FLASH MEMORY), the F206 can be programmed and erased online by the emulator. The F206 has a 4-stage pipeline structure. Its instruction set is optimized for multiply-add operations commonly used in signal processing. It supports single-cycle multiply/accumulate instructions. It supports memory block move instructions to better manage programs and data. ; Support base 2 FFT bit reverse search addressing.

In addition to supporting high-speed operations, the F206 also has a large number of on-chip peripherals, including: 1 software programmable timer; 2 software programmable wait state generator for program, data, I / O memory space, easy and low-speed devices Interface; 3 on-chip oscillator and phase-locked loop (PLL) for clock selection × 1, × 2, × 4, ÷ 2; 4 synchronous serial port, easy to interface with serial CODEC; 5 full-duplex asynchronous serial port, Easy to communicate with PC.

2 hardware components

The ECG monitoring module has 4 inputs: two ECG signals ECG1 and ECG2, one body temperature signal TEMPI, and one respiratory signal RESP, which use time-division sampling. Since the frequency of the respiratory signal and the body temperature signal is much smaller than the frequency of the electrocardiographic signal, the ECG signal is used as a reference when determining the sampling rate. Experience has shown that when doing conventional electrocardiography, the bandwidth of the system is required to be around 100 Hz. According to the Nyquist sampling theorem, the sampling frequency must be no less than 200 Hz. Considering a certain working margin, the sampling rate of each working channel is 250 Hz, so that for 4 channels, the total operating frequency is 1 kHz. The channel switching operation is realized by a bidirectional analog switch CD4051. The C, B, and A control terminals are connected to the three address lines of the TMS320F206, and the corresponding analog channels are opened by the I/O command to perform signal sampling.

The sampling and quantification of the signal is done by a single ADS774. The ADS774 is a 12-bit successive approximation parallel A/D converter manufactured by Burr-Brown Corporation of the United States. The typical conversion time is 8.5μs, and there are many working modes available for users to choose. In this ECG module, we chose the through-through mode. Only two control lines R/C and STATUS are used to interface with TSM320F206. The working principle and timing are shown in Figure 2.

The TMS320F206 initiates a conversion of the ADS774 by generating a low-level pulse with a width greater than 25ns on the XF pin. After startup, the STATUS pin of the ADS774 goes high. After the conversion is completed, the data on the ADS774 data line is valid. At this time, its STATUS pin jumps back to low level. This level jump triggers the INT1 external interrupt of the TMS320F206. The 12-bit conversion data is read into the data memory.

Due to the limited data storage space on the TMS320F206, in order to save a large amount of sample data and the intermediate result of the operation, the external data memory needs to be added. At the same time, in order to set the breakpoint and single step operation when debugging the program, it is also necessary to add external program memory. . We used four 8-bit SRAM HM62256-10 from Hitachi, which consists of 16-bit program memory and data memory, which are chip-selected with F206 PS and DS signals respectively. The typical access time of the HM62256-10 is 100ns, while the TMS320F206 has an instruction cycle of 50ns. In order to save the cost of the hardware waiting circuit, the TMS320F206 on-chip programmable software wait state generator generates two wait states to meet the memory operating time requirements. The TMS320F206 on-chip integrated full-duplex asynchronous serial port can realize the communication between the ECG module and the PC. However, the RS232 level is not compatible with the TTL level. We used a level-shifting chip, the MAX202, which operates from a single +5V supply. It can be converted to two levels with only a few capacitors. In order to prevent data from being disturbed during transmission, an optocoupler is added to the input and output terminals.

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